Mercurial > 11etigp
changeset 146:2d126fccf65f
typos, missing pins
author | Markus Kaiser <markus.kaiser@in.tum.de> |
---|---|
date | Fri, 16 Aug 2013 15:48:47 +0200 |
parents | fafb2682b398 |
children | dff32e12a424 |
files | src/speci/fft/sqrt.vhd src/speci/states.vhd |
diffstat | 2 files changed, 17 insertions(+), 11 deletions(-) [+] |
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--- a/src/speci/fft/sqrt.vhd Fri Aug 16 15:47:59 2013 +0200 +++ b/src/speci/fft/sqrt.vhd Fri Aug 16 15:48:47 2013 +0200 @@ -5,7 +5,7 @@ entity SQRT is Generic ( width : Integer := 32 - ); -- Breite + ); Port ( clk : in std_logic; start : in std_logic; value : in unsigned(width-1 downto 0); @@ -64,6 +64,6 @@ end case; end process; - result <= res; + result <= res(width/2 downto 0); end;
--- a/src/speci/states.vhd Fri Aug 16 15:47:59 2013 +0200 +++ b/src/speci/states.vhd Fri Aug 16 15:48:47 2013 +0200 @@ -33,18 +33,20 @@ architecture Behavioral of states is component audiobuffer is generic( - size : integer := fft_size; + addr : integer := fft_size_log; word : integer := 24 ); - port( - ad_clk : in std_logic; + Port( + ad_clk : in std_logic; ad_data : in unsigned(word-1 downto 0); - read_clk : in std_logic; - read_enable : in std_logic; - read_data : out unsigned(word-1 downto 0); + read_clk : in std_logic; + read_enable : in std_logic; + read_addr : in unsigned(addr-1 downto 0); + read_data : out unsigned(word-1 downto 0); - readable : out std_logic + readable : out std_logic; + reset : in std_logic ); end component; @@ -164,7 +166,7 @@ -- FIXME: Type conversion? fft_datainre(8 downto 0) <= (others => '0'); -- does this fix work at all? - fft_datainre(-1 downto -8) <= to_fpv(to_integer(adbuf_data(22 downto 15))); + fft_datainre(-1 downto -8) <= to_fpv(to_integer(adbuf_data(22 downto 15)))(7 downto 0); fft_datainim <= to_fpv(0); copy_addr <= copy_addr + 1; @@ -250,7 +252,11 @@ read_clk => clk, read_enable => adbuf_read_enable, - read_data => adbuf_data + read_data => adbuf_data, + read_addr => copy_addr, + + readable => adbuf_readable, + reset => '0' ); fftrans : FFT